The annual Hot Chips forum on semiconductor research, beginning Monday (US time) at Stanford University, usually draws industry leaders like IBM, Intel and AMD, but also new companies with ambitions to take on the big firms.
While Advanced Micro Devices, IBM and Intel will be discussing their two-core and four-core processors, little Tilera will use the conference to introduce itself and its 64-core processor to the chip industry.
"As the name implies, Hot Chips is a conference for, you know, cool chips," said Anal Agrawal, chief technology officer of Tilera.
All kidding aside, Agrawal said Hot Chips is a great venue at which to announce a launch, but also the timing was ideal for Tilera. "We wanted to announce after we had a completed chip and had begun shipping to real customers," he said.
Hot Chips is an annual gathering of researchers, academics, and industry leaders discussing present and future developments in semiconductors, said John Sell, general chairman of the conference.
Before the event, companies present a research abstract of their product and Hot Chips participants evaluate each and choose the most promising ones to present in person at the conference. A record 600 attendees are registered for this 19th Hot Chips event, and 26 projects will be presented, said Sell.
"We want a presentation that is of good quality, meaning that they have the appropriate technical detail and not much marketing," he said.
Tilera's grid-style chip architecture began as a research project in 1997 at the Massachusetts Institute of Technology (MIT), said Agrawal. Its TILE64 processor, which is designed to be an embedded processor in intelligent networking and digital media distribution equipment, has been sold to networking companies such as 3Com and video network equipment providers such as Codian and GoBackTV.
The major chip makers improve performance by going from one core to two and then four, but Agrawal says there is a limit to how much more those core numbers can grow.
Conventional chips have a central bus, or hub, that signals go through in and out of the chipset, he said. Like an old European city, all roads lead to the center of town. Tilera's grid pattern offers multiple paths across the chip like the street grid on a modern city.
Tilera's grid is created by placing tiles in eights row of eight tiles apiece, hence the name TILE64. Each tile contains a switch that moves the data along to the next tile. With a grid, data packets move more smoothly and without stopping as they would as traffic backs up going through a central hub. TILE64 is priced at US$435 in orders of a minimum of 10,000 units.
Intel has been working on a similar grid design under its Tera-scale Computing Research Program, but, Agrawal said, "we're early."
Tilera's innovation seems to have more practical value than other presentations, which demonstrate great performance, but limited market value, said Nathan Brookwood, an analyst with Insight64.