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HSA maximises the CPU/GPU combination: AMD

HSA maximises the CPU/GPU combination: AMD

Chip manufacturer develops new architecture to unlock the potential of PCs

Heterogeneous System Architecture (HSA) is designed to squeeze out the last bit of chip performance, according to AMD.

Global software alliance senior director, Neal Robison, said the improved architecture came out of the desire to have something where the CPU and GPU would be “equal partners.”

“Even with some putting both cores on the same chip, today’s CPU is typically in control of everything and has a master/slave relationship with the GPU,” he said.

To overcome that legacy design, Robison said AMD came up with Heterogeneous Unified Memory Architecture (HUMA).

In simple terms, HUMA is shared virtual memory where both the CPU and GPU can have the same memory address space.

“Your pointers will address the same memory, so you don’t need to do a ton of copying over the bus like you do now to send any kind of instructions to the GPU,” Robison said.

“It helps to accelerate applications as they both make changes to the same memory.”

Chasing perfomance

One driver to tweak the chip architecture was to get the most out of performance.

“There is approximately 120 gigaflops of processing capability on an APU right now,” Robison said.

“But when you look at the GPU, you have over 700 gigaflops of compute capability.”

Numbers such as these may seem impressive on paper, though Robison said the real benefit is in software developers “getting access to the entire thing.”

“Not just one or the other, but everything altogether and allow them to flex their muscles with software to access all of that power in the system,” he said.

Adding capability

Another driver to rework the chip architecture was to achieve flexibility.

Robison said the CPU now typically issues commands to either itself through scheduling, queuing, or to the GPU.

Under HSA, the GPU is capable of issuing instructions to the CPU or to itself, which Robison said leads to more flexibility depending on the tasks and instructions.

AMD has dubbed this process of queuing tasks for either of those chips as Heterogeneous Queuing (HQ).

“We believe through those different methodologies we give applications much more power,” Robison said.

Patrick Budmar covers consumer and enterprise technology breaking news for IDG Communications. Follow Patrick on Twitter at @patrick_budmar.

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